Items where Author is "Jeanshilpa, V"

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Karthik, S and Priyadarsini, K and Jeanshilpa, V (2018) VLSI SYSTEMS FOR SIMULTANEOUS IN LOGIC SIMULATION. In: 2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC), Malaysia, Malaysia.

This list was generated on Wed Sep 16 01:33:07 2026 IST.